The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2019
Filed:
Sep. 30, 2015
Agile Power Switch 3d—integration Apsi3d, Tarbes, FR;
Irt Saint Exupery (Aese), Toulouse, FR;
Jacques Pierre Henri Favre, Toulouse, FR;
Jean-Michel Francis Reynes, Gaillac, FR;
Raphaël Riva, Ger, FR;
Bernard José Charles Du Trieu De Terdonck, Castanet-Tolosan, FR;
AGILE POWER SWITCH 3D—INTEGRATION APSI3D, Tarbes, FR;
IRT SAINT EXUPERY (AESE), Toulouse, FR;
Abstract
Some embodiments relate to a semiconductor power device that includes a first substrate, a second substrate, a stack and an interconnect structure. The first substrate includes a first patterned electrically conductive layer on a first surface and a switching semiconductor element. The second substrate includes a second surface facing the first surface and a second patterned electrically conductive layer on the second surface. The stack includes an electrically conductive track and a layer of a dielectric material. The layer of the dielectric material is provided on the first or second patterned electrically conductive layer and the layer of the dielectric material isolates the electrically conductive track from the patterned electrically conductive layer on which the stack is provided. The interconnect structure provides at least one electrical connection electrically conductive layers or areas of the substrates.