Static random access memory (sram) bit cells employing current mirror-gated read ports for reduced power consumption

Abstract

Static random access memory (SRAM) bit cells employing current mirror-gated read ports for reduced power consumption are disclosed. In one aspect, an SRAM bit cell includes a read port employing a first transistor electrically coupled to a current sum line and to a current mirror circuit. A level of current that flows through the first transistor in response to voltage applied by the current mirror circuit correlates to a magnitude of the voltage. The read port includes a second transistor electrically coupled to the first transistor, to a driver circuit, and to an output node of a first inverter. Connecting the first and second transistors of the read port in this manner allows a voltage applied to the second transistor to generate a current that flows to the first transistor if the second transistor is activated. The current level depends on the voltage applied by the current mirror circuit.