The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2019
Filed:
Nov. 27, 2013
Intel Corporation, Santa Clara, CA (US);
Dimitrios Ziakas, Hillsboro, OR (US);
Bassam N. Coury, Dupont, WA (US);
Mohan J. Kumar, Aloha, OR (US);
Murugasamy K. Nachimuthu, Hillsboro, OR (US);
Thi Dang, Olympia, WA (US);
Russell J. Wunderlich, Livermore, CO (US);
Dimitrios Ziakas, Hillsboro, OR (US);
Bassam N. Coury, Dupont, WA (US);
Mohan J. Kumar, Aloha, OR (US);
Murugasamy K. Nachimuthu, Hillsboro, OR (US);
Thi Dang, Olympia, WA (US);
Russell J. Wunderlich, Livermore, CO (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Systems and methods of implementing server architectures that can facilitate the servicing of memory components in computer systems. The systems and methods employ nonvolatile memory/storage modules that include nonvolatile memory (NVM) that can be used for system memory and mass storage, as well as firmware memory. The respective NVM/storage modules can be received in front or rear-loading bays of the computer systems. The systems and methods further employ single, dual, or quad socket processors, in which each processor is communicably coupled to at least some of the NVM/storage modules disposed in the front or rear-loading bays by one or more memory and/or input/output (I/O) channels. By employing NVM/storage modules that can be received in front or rear-loading bays of computer systems, the systems and methods provide memory component serviceability heretofore unachievable in computer systems implementing conventional server architectures.