The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Feb. 01, 2018
Infineon Technologies Austria Ag, Villach, AT;
Gerhard Prechtl, Rosegg, AT;
Severin Kampl, Villach, AT;
Infineon Technologies Austria AG, Villach, AT;
Abstract
A semiconductor assembly includes a first FET having gate, source and drain terminals, a switching device being configured to electrically short a gate-source capacitance of the first FET responsive to a control signal, a first gate lead, a second gate lead, a drain lead, and a source lead. The first and second gate leads, the drain lead, and the source lead form externally accessible terminals of the semiconductor assembly. A reverse blocking rating of the switching device is less than a reverse blocking rating of the first FET. A gate of the first FET is directly electrically connected to the first gate lead. A gate of the switching device is directly electrically connected to the second gate lead. The first FET and the switching device are the only active semiconductor devices connected between the first gate lead, the second gate lead, the drain lead, and the source lead.