The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Jul. 17, 2017
Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;
Masayuki Kitamura, Yokohama, JP;
Atsuko Sakata, Yokohama, JP;
Makoto Wada, Yokohama, JP;
Yuichi Yamazaki, Inagi, JP;
Masayuki Katagiri, Kawasaki, JP;
Akihiro Kajita, Yokohama, JP;
Tadashi Sakai, Yokohama, JP;
Naoshi Sakuma, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.