The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Aug. 10, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Daniel Daeik Kim, Del Mar, CA (US);

Jie Fu, San Diego, CA (US);

Manuel Aldrete, Encinitas, CA (US);

Jonghae Kim, San Diego, CA (US);

Changhan Hobie Yun, San Diego, CA (US);

David Francis Berdy, San Diego, CA (US);

Chengjie Zuo, San Diego, CA (US);

Mario Francisco Velez, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 21/56 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/09 (2013.01); H01L 21/563 (2013.01); H01L 23/3157 (2013.01); H01L 23/3675 (2013.01); H01L 23/3677 (2013.01); H01L 23/481 (2013.01); H01L 23/49816 (2013.01); H01L 24/03 (2013.01); H01L 24/11 (2013.01); H01L 24/14 (2013.01); H01L 24/06 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/92 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/131 (2013.01); H01L 2224/14051 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/92125 (2013.01); H01L 2924/15321 (2013.01);
Abstract

A semiconductor device according to some examples of the disclosure may include a package substrate, a semiconductor die coupled to one side of the package substrate with a first set of contacts on an active side of the semiconductor die and coupled to a plurality of solder prints with a second set of contacts on a back side of the semiconductor die. The semiconductor die may include a plurality of vias connecting the first set of contacts to the second set of contacts and configured to allow heat to be transferred from the active side of the die to the plurality of solder prints for a shorter heat dissipation path.


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