The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

May. 25, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Yosuke Nosho, Yokkaichi, JP;

Han-Min Kim, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 27/1157 (2017.01); H01L 27/11524 (2017.01); H01L 27/11556 (2017.01); H01L 27/11573 (2017.01); H01L 27/11575 (2017.01); H01L 27/11582 (2017.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 21/76877 (2013.01); H01L 21/76829 (2013.01); H01L 21/76843 (2013.01); H01L 21/76855 (2013.01); H01L 21/76889 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 23/53266 (2013.01); H01L 23/53271 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11565 (2013.01); H01L 27/11573 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01); H01L 23/53295 (2013.01);
Abstract

A semiconductor structure includes a semiconductor device located over a substrate, a dielectric layer stack of at least one first dielectric material layer, a silicon nitride layer, and at least one second dielectric material layer overlying the semiconductor device, and interconnect structures including metallic lines and metallic vias and embedded within the dielectric layer stack. The interconnect structures also include a metal silicide portion that directly contacts the silicon nitride layer. A combination of the silicon nitride layer and the metal silicide portion provides a continuous hydrogen barrier structure that is vertically spaced from the top surface of the semiconductor device.


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