The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2019
Filed:
Jun. 29, 2015
Dspace Digital Signal Processing and Control Engineering Gmbh, Paderborn, DE;
Heiko Kalte, Paderborn, DE;
Lukas Funke, Paderborn, DE;
dSPACE digital signal processing and control engineering GmbH, Paderborn, DE;
Abstract
A method for generating FPGA code based on an FPGA model with at least one signal value that is modeled as a constant. A constant is inserted with a predefined signal value in the FPGA model. A switching variable is set in the FPGA model for switching between a normal mode and a calibration mode for the FPGA code. The FPGA code is generated for the FPGA model having the implementation of the constants in the FPGA code, wherein the implementation of the constants when the switching variable is set for normal mode includes the implementation of the constants as a fixed value in the FPGA code, and the implementation of the constants when the switching variable is set for calibration mode includes the implementation of the constants as a modifiable signal value in the FPGA code. A method for calibrating an FPGA model is also provided.