The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

May. 20, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Naiju K. Abdul, Bangalore, IN;

Adil Bhanji, Wappingers Falls, NY (US);

Jack DiLullo, Austin, TX (US);

Kerim Kalafala, Rhinebeck, NY (US);

Jeremy J. Leitzen, Kasson, MN (US);

Manish Verma, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5045 (2013.01); G06F 17/5031 (2013.01); G06F 2217/62 (2013.01);
Abstract

A system and method to generate a clock domain-independent abstract of a component in an integrated circuit design. The method includes performing an initial analysis of the component using an initial clock value for each clock domain type, the clock domain types including a functional clock and a test clock, executing an abstractor to obtain a reduced order model of the initial analysis as a clock domain-dependent abstract, and obtaining original constraints associated with one or more circuit elements within the component from the clock domain-dependent abstract. Generating generalized constraints is based on clock domain-dependent constraints among the original constraints, and generating the clock domain-independent abstract is based on the generalized constraints. The method also includes obtaining a physical implementation based on one or more analyses using the clock domain-independent abstract.


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