The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10318292 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 11, 2019

Filed:

Nov. 17, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Satyajit Sarangi, Santa Clara, CA (US);

Thomas F. Raoux, Mountain View, CA (US);

Guei-Yuan Lueh, San Jose, CA (US);

Subramaniam Maiyuran, Gold River, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30032 (2013.01); G06F 9/3001 (2013.01); G06F 9/3004 (2013.01); G06F 9/3017 (2013.01); G06F 9/30036 (2013.01);
Abstract

Systems and methods may process a single atomic operation. An instruction set may be generated to replace a plurality of atomic operations with a single atomic operation. The instruction set may include an accumulation instruction to compute a prefix sum for a plurality of initial values associated with a plurality of processing lanes to generate a plurality of accumulated values. The instruction set may also include a broadcast instruction to return a pre-existing value to be added with each of the plurality of accumulated values to generate a plurality of intermediate accumulated values. In one example, a graphics processor may execute the instruction set to process the single atomic operation.


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