The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10305498 B1

PDF
Full Text
Expired
Date of Patent:
May. 28, 2019

Filed:

Sep. 28, 2018
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventor:

Mark A. Summers, Cary, NC (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/087 (2006.01); H03L 7/091 (2006.01); H03L 7/093 (2006.01); H03L 7/095 (2006.01); H03L 7/097 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
H03L 7/087 (2013.01); H03L 7/091 (2013.01); H03L 7/093 (2013.01); H03L 7/095 (2013.01); H03L 7/097 (2013.01); G06F 17/5045 (2013.01);
Abstract

Various embodiments provide for a circuit for measuring a frequency difference, a phase difference, or both of at least two clock signals (e.g., a reference clock signal and a feedback clock signal). In particular, various embodiments described herein may be used in a circuit design to convert an input phase of two clock signals to a frequency difference, which may be outputted in the form of a digital word. Additionally, various embodiments described herein may be used in a circuit design to convert an input phase of two clock signals as phase difference output, which may be outputted in the form of a digital word. Various embodiments can provide the frequency difference, the phase difference, or both in near real-time and with only a small amount of latency.


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