The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2019
Filed:
Feb. 20, 2018
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 21/762 (2006.01); H01L 21/28 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66621 (2013.01); H01L 21/28008 (2013.01); H01L 21/762 (2013.01); H01L 29/4236 (2013.01); H01L 29/4966 (2013.01); H01L 29/4983 (2013.01); H01L 29/518 (2013.01); H01L 29/785 (2013.01);
Abstract
An integrated circuit device may include a gate dielectric layer on an inner surface of a gate trench of a substrate, a gate structure filling a portion of the gate trench on the gate dielectric layer, and an insulating, capping pattern on an upper surface of the gate structure in the gate trench. The gate structure may include a lower gate line having a first work function, an upper gate line having a second work function lower than the first work function, a first blocking layer between the lower gate line and the upper gate line, and a second blocking layer between the upper gate line and the insulating capping pattern.