The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Dec. 28, 2017
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Adam Johnson, Meridian, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/004 (2013.01); G11C 13/0004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0011 (2013.01); G11C 29/74 (2013.01); G11C 2013/005 (2013.01); G11C 2013/0088 (2013.01); G11C 2213/32 (2013.01); G11C 2213/79 (2013.01);
Abstract

Some embodiments include methods of storing and retrieving data for an RRAM array. The array is subdivided into a plurality of memory bits, with each memory bit having at least two memory cells. A memory bit is programmed by simultaneously changing resistive states of all memory cells within the memory bit. The memory bit is read by determining summed current through all memory cells within the memory bit. Some embodiments include RRAM having a plurality of memory cells. Each of the memory cells is uniquely addressed through a bitline/wordline combination. Memory bits contain multiple memory cells coupled together, with the coupled memory cells within each memory bit being in the same resistive state as one another.


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