Active interposer for localized programmable integrated circuit reconfiguration

Abstract

A system may include a host processor, an interposer having memory elements, a coprocessor mounted on the interposer for accelerating tasks received from the host processor, and an auxiliary chip. The coprocessor, interposer, and auxiliary chip may be part of an integrated circuit package. The memory elements on the interposer may convey configuration bit streams to one or more logic sectors in programmable circuitry of the coprocessor. The interposer may be connected to a package substrate of the integrated circuit package using through-silicon vias, such that an active surface of the interposer faces an active surface of the coprocessor. Each logic sector may include one or more data registers that are loaded with configuration data from the memory elements. In some instances, the auxiliary chip may include a secondary memory for storing additional configuration bit streams for configuring the logic sectors of the coprocessor.