The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Sep. 14, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Srinivasa Banna, San Jose, CA (US);

Deepak Nayak, Fremont, CA (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 31/00 (2006.01); H01L 33/06 (2010.01); H01L 33/00 (2010.01); H01L 33/32 (2010.01); H01L 33/30 (2010.01); H01L 27/15 (2006.01); H01L 33/42 (2010.01); H01L 33/44 (2010.01); H01L 33/62 (2010.01); H01L 33/24 (2010.01);
U.S. Cl.
CPC ...
H01L 33/06 (2013.01); H01L 27/15 (2013.01); H01L 33/007 (2013.01); H01L 33/0066 (2013.01); H01L 33/0079 (2013.01); H01L 33/24 (2013.01); H01L 33/30 (2013.01); H01L 33/32 (2013.01); H01L 33/42 (2013.01); H01L 33/44 (2013.01); H01L 33/62 (2013.01); H01L 2933/0016 (2013.01); H01L 2933/0025 (2013.01); H01L 2933/0066 (2013.01);
Abstract

Methods of forming an integrated InGaN/GaN or AlInGaP/InGaP LED on Si CMOS for RGB colors and the resulting devices are provided. Embodiments include forming trenches having a v-shaped bottom through an oxide layer and a portion of a substrate; forming AlN or GaAs in the v-shaped bottom; forming a n-GaN or n-InGaP pillar on the AlN or GaAs through and above the first oxide layer; forming an InGaN/GaN MQW or AlInGaP/InGaP MQW over the n-GaN or n-InGaP pillar; forming a p-GaN or p-InGaP layer over the n-GaN pillar and InGaN/GaN MQW or the n-InGaP pillar and AlInGaP/InGaP MQW down to the first oxide layer; forming a TCO layer over the first oxide layer and the p-GaN or p-InGaP layer; forming a second oxide layer over the TCO layer; and forming a metal pad on the TCO layer above each n-GaN or n-InGaP pillar.


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