The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Apr. 12, 2018
Applicant:

Epistar Corporation, Hsinchu, TW;

Inventors:

Ya-Yu Yang, Hsinchu, TW;

Yu-Jiun Shen, Hsinchu, TW;

Chia-Cheng Liu, Hsinchu, TW;

Assignee:

Epistar Corporation, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/778 (2006.01); H01L 29/205 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 21/0254 (2013.01); H01L 21/02389 (2013.01); H01L 21/02458 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66431 (2013.01);
Abstract

A semiconductor power device includes an engineered aluminum-nitride substrate structure, and method of fabricating the same are described. The engineered substrate structure is effectively integrated with a transition layer of AlN/AlGaN disposed thereon, a buffer layer disposed on the transition layer having a C—(Al)GaN/u-GaN multiple stacking layered structure, a channel layer, a barrier layer, and an optional SiNinterlayer together, to form a GaN-based semiconductor power device. The GaN buffer layer is capable of achieving sufficient thickness for higher performance. The engineered substrate structure has a core region made of an aluminum nitride (AlN) substrate, a single crystal silicon layer as top material layer thereof, and bonded together with an encapsulated multi-layered structure containing adhesive layers, thin film layers and the AlN substrate. Higher breakdown voltage and improved overall device quality with respect to epitaxy-induced bow, warp, and cracking issues are achieved by the semiconductor power device.


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