The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Apr. 18, 2016
Applicant:

Gan Systems Inc., Ottawa, CA;

Inventors:

John Roberts, Kanata, CA;

Hugues Lafontaine, Ottawa, CA;

Assignee:

GaN Systems Inc., Ottawa, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0248 (2013.01);
Abstract

An integrated gate protection device P for a GaN power transistor Dprovides negative ESD spike protection. Protection device P comprises a smaller gate width wenhancement mode GaN transistor Pm. The source of Pm is connected to its gate, the drain of Pm is connected to the gate input of D, and the source of Pm is connected to the intrinsic source of D. When the gate input voltage is taken negative below the threshold voltage for reverse conduction, Pm conducts and quenches negative voltage spikes. When device P comprises a plurality of GaN protection transistors Pto Pn, connected in series, it turns on when the gate input voltage applied to the drain of Pgoes negative by more than the sum of the threshold voltages of Pto Pn. The combined gate width of Pto Pn is selected to limit the gate voltage excursion of D


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