The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Feb. 27, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Xia Li, San Diego, CA (US);

Xiao Lu, San Diego, CA (US);

Xiaonan Chen, San Diego, CA (US);

Zhongze Wang, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); H01L 29/792 (2006.01); G11C 16/04 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01); H01L 29/423 (2006.01); H01L 27/112 (2006.01); G11C 17/14 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 16/0466 (2013.01); G11C 17/146 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); H01L 27/11206 (2013.01); H01L 29/42348 (2013.01); H01L 29/7923 (2013.01);
Abstract

A semiconductor device for a one-time programmable (OTP) memory according to some examples of the disclosure includes a gate, a dielectric region below the gate, a source terminal below the dielectric region and offset to one side, a drain terminal below the dielectric region and offset to an opposite side from the source terminal, a drain side charge trap in the dielectric region capable of programming the semiconductor device, and a source side charge trap in the dielectric region opposite the drain side charge trap and capable of programming the semiconductor device.


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