The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2019
Filed:
Feb. 28, 2017
Cadence Design Systems, Inc., San Jose, CA (US);
Taranjit Singh Kukal, Delhi, IN;
Arnold Jean Marie Gustave Ginetti, Antibes, FR;
Steven Roberts Durrill, Campbell, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Embodiments include herein are directed towards a method for use in an electronic design environment is provided. The method may include receiving, using a processor, a parent fabric corresponding to a top layout fabric associated with an electronic design and receiving a child fabric corresponding to a child layout fabric associated with the electronic design. The method may further include receiving an electromagnetic ('EM') model that represents one or more cross-fabric geometries associated with the electronic design and generating a hierarchical schematic representing each layout fabric, wherein the EM model is inserted into a parent schematic. The method may also include managing one or more interface connections between the hierarchical schematic.