The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Jun. 01, 2016
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Rajesh Khanna, Nashua, NH (US);

Matthew Timothy Bromley, Portland, OR (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5045 (2013.01);
Abstract

The present disclosure relates to a computer-implemented method for electronic design automation. Embodiments may include providing, using at least one processor, an electronic circuit design at a graphical user interface. Embodiments may further include associating one or more metrics with the electronic circuit design, wherein the one or more metrics include at least one of process metrics, design metrics, issues, library metrics, and custom metrics. Embodiments may further include allowing a user to specify one or more rules that define a key performance indicator for at least a portion of the electronic circuit design, wherein the key performance indicator is based upon, at least in part, the one or more metrics. After a design process associated with the electronic circuit design has been initiated, embodiments may include displaying the key performance indicator at the graphical user interface.


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