The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Mar. 03, 2017
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Rotem Avivi, Petah-Tiqwa, IL;

Michael Kerner, Tel Mond, IL;

Assaf Gurevitz, Ramat Hasharon, IL;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/18 (2006.01); H04L 1/00 (2006.01); H04B 1/40 (2015.01); H04L 27/00 (2006.01); H04B 1/04 (2006.01); H04B 1/525 (2015.01); H04B 7/0404 (2017.01);
U.S. Cl.
CPC ...
H04L 1/0033 (2013.01); H04B 1/0475 (2013.01); H04B 1/40 (2013.01); H04B 1/525 (2013.01); H04L 1/0036 (2013.01); H04L 27/0002 (2013.01); H04B 7/0404 (2013.01);
Abstract

A spur cancelation system includes error circuitry, inverse spur circuitry, and injection circuitry. The error circuitry is configured to generate an error signal based at least on a first transceiver signal in a transceiver signal processing chain. The inverse spur circuitry is configured to, based at least on the error signal, determine a gain and a phase of a spur signal in the transceiver signal and generate an inverse spur signal based at least on the gain and the phase of the spur signal. The injection circuitry is configured to inject the inverse spur signal to cancel a spur in a second transceiver signal in the transceiver signal processing chain.


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