The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2019

Filed:

Nov. 21, 2017
Applicant:

Abb Schweiz Ag, Baden, CH;

Inventors:

Felix Traub, Birmenstorf, CH;

Fabian Mohn, Ennetbaden, CH;

Juergen Schuderer, Zürich, CH;

Daniel Kearney, Zürich, CH;

Slavo Kicin, Zürich, CH;

Assignee:

ABB Schweiz AG, Baden, CH;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/64 (2006.01); H01L 25/07 (2006.01); H01L 29/00 (2006.01); H01L 23/373 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5385 (2013.01); H01L 23/645 (2013.01); H01L 25/072 (2013.01); H01L 29/00 (2013.01); H01L 23/3735 (2013.01); H01L 23/49811 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/49111 (2013.01); H01L 2924/19107 (2013.01);
Abstract

The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane. The first plane is spaced apart from the second plane in a direction normal to the first plane, whereby the first substrate is based on a direct bonded copper substrate and the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a layer of a printed circuit board is provided for carrying the diode. Alternatively, the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a foil is provided for carrying the diode, wherein the foil comprises an electrically insulating main body and an electrically conductive structure provided thereon for carrying the diode. Such a power semiconductor module provides a low stray inductance and/or may be built easily.


Find Patent Forward Citations

Loading…