The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2019
Filed:
Oct. 24, 2017
Applicant:
Silicon Storage Technology, Inc., San Jose, CA (US);
Inventors:
Hieu Van Tran, San Jose, CA (US);
Anh Ly, San Jose, CA (US);
Thuan Vu, San Jose, CA (US);
Hung Quoc Nguyen, Fremont, CA (US);
Vipin Tiwari, Dublin, CA (US);
Assignee:
SILICON STORAGE TECHNOLOGY, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/28 (2006.01); G11C 16/06 (2006.01); H01L 27/11519 (2017.01); G11C 16/24 (2006.01); G11C 16/00 (2006.01); G11C 7/06 (2006.01); G11C 7/12 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G11C 7/062 (2013.01); G11C 7/067 (2013.01); G11C 7/12 (2013.01); G11C 16/00 (2013.01); G11C 16/06 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); H01L 27/11519 (2013.01); G11C 2207/063 (2013.01);
Abstract
Improved flash memory sensing circuits are disclosed. In one embodiment, a sensing circuit comprises a memory data read block, a memory reference block, a differential amplifier, and a precharge circuit. The precharge circuit compensates for parasitic capacitance between a bit line coupled to a selected memory cell and adjacent bit lines.