The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

May. 23, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yu-Tso Lin, New Taipei, TW;

Chih-Hsien Chang, Taipei, TW;

Min-Shueh Yuan, Taipei, TW;

Robert Bogdan Staszewski, Dulin, IE;

Seyednaser Pourmousavian, Dublin, IE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H02M 3/07 (2006.01); H01L 29/94 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H02M 3/07 (2013.01); H01L 29/94 (2013.01); H03K 19/018521 (2013.01);
Abstract

A device includes a level shifter and a voltage multiplier. The level shifter is responsive to a first clock signal configured to shift the first clock signal to a second clock signal at a higher level than the first clock signal based on a node voltage. The voltage multiplier is responsive to the second clock signal for generating the node voltage. The node voltage is output from the voltage multiplier for driving a load and is further fed back to the level shifter for generating the second clock signal.


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