The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2019
Filed:
Jun. 30, 2017
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventor:
Shiann-Tsong Tsai, Hsinchu, TW;
Assignee:
MEDIATEK INC., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/14 (2006.01); H01L 23/495 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/145 (2013.01); H01L 23/4952 (2013.01); H01L 23/49827 (2013.01); H01L 23/49894 (2013.01); H01L 23/5226 (2013.01); H01L 24/17 (2013.01); H01L 23/49816 (2013.01); H01L 2924/15311 (2013.01);
Abstract
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a core substrate formed of a first material having a device-attach surface and a solder-bump-attach surface opposite to the die-attach surface. A bump pad is disposed on the bump-attach surface. A first solder mask layer formed of the first material covers the bump-attach surface of the core substrate and a portion of the bump pad. A second solder mask layer covers the device-attach surface of the core substrate, wherein the second solder mask layer is formed of a second material.