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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10276375 B1

PDFFull Text
Date of Patent:
Apr. 30, 2019

Filed:

Nov. 18, 2016

Assistant pattern for measuring critical dimension of main pattern in semiconductor manufacturing

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Hung-Wen Cho, Hsin-Chu, TW;

Wen-Chen Lu, Hsinchu County, TW;

Chaos Tsai, Hsin-Chu County, TW;

Feng-Jia Shiu, Hsinchu County, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsin-Chu, TW;

Attorney:

Haynes and Boone, LLP

Primary Examiner:

Phallaka Kik

Int. Cl.
CPC ...
G06F 17/50 (2006.01); G03F 1/20 (2012.01); G03F 7/00 (2006.01); H01L 21/033 (2006.01); G03F 7/20 (2006.01); H01L 21/66 (2006.01); G03F 1/44 (2012.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0334 (2013.01); G03F 1/20 (2013.01); G03F 1/44 (2013.01); G03F 7/70058 (2013.01); G03F 7/70625 (2013.01); G03F 7/70683 (2013.01); G06F 17/5045 (2013.01); G06F 17/5081 (2013.01); H01L 22/20 (2013.01); H01L 22/30 (2013.01); H01L 23/544 (2013.01); G06F 2217/12 (2013.01); H01L 22/12 (2013.01); H01L 2223/54426 (2013.01);
Abstract

A method includes receiving an integrated circuit (IC) layout having a pattern layer. The pattern layer includes a main layout pattern. A dimension Wof the main layout pattern along a first direction is greater than a wafer metrology tool's critical dimension (CD) measurement upper limit. The method further includes adding a plurality of assistant layout patterns into the pattern layer. The plurality of assistant layout patterns includes a pair of CD assistant layout patterns on both sides of the main layout pattern along the first direction. The pair of CD assistant layout patterns have a substantially same dimension Walong the first direction and are about equally distanced from the main layout pattern by a dimension D. The dimensions Wand Dare greater than a printing resolution in a photolithography process and are equal to or less than the wafer metrology tool's CD measurement upper limit.

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