The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2019

Filed:

Aug. 23, 2018
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Shaojun Ma, San Jose, CA (US);

Parag Upadhyaya, Los Gatos, CA (US);

Didem Z. Turker Melek, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H03H 11/28 (2006.01); H03K 19/0175 (2006.01); H04B 3/04 (2006.01); H03K 17/0812 (2006.01); H03K 19/018 (2006.01); H04B 1/04 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018592 (2013.01); H03H 11/28 (2013.01); H03K 17/08122 (2013.01); H03K 19/017581 (2013.01); H03K 19/018578 (2013.01); H04B 3/04 (2013.01); H03K 2217/0036 (2013.01);
Abstract

Methods and apparatus relate to a bidirectional differential interface having a voltage-mode transmit driver architecture formed of multiple selectively enabled slices for coarse output resistance impedance matching. In an illustrative example, the transmit driver may include a programmable resistance for fine-tuning to impedance match the output resistance for transmit operation. During receive operation, protective voltage may be proactively applied to gates of drive transistors, for example, to minimize voltage stresses applied by external signal sources. Some implementations may automatically float the sources of the drive transistors, for example, to prevent back-feeding externally driven signal currents during receive mode operations. The transmit driver may have programmable voltage swing on, for example, the upper and/or lower bounds to enhance compatibility. A programmable common mode voltage node may be selectively applied, for example, through common mode resistors for receive mode operations. Various embodiments may reduce pin count for high speed bidirectional I/O.


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