The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2019
Filed:
Jun. 27, 2017
Intel Ip Corporation, Santa Clara, CA (US);
Michael Kerner, Tel Mond, IL;
Elan Banin, Raanana, IL;
Yair Dgani, Raanana, IL;
Evgeny Shumaker, Nesher, IL;
Danniel Nahmanny, Givat Shapira, IL;
Gil Horovitz, Emek-Hefer, IL;
Intel IP Corporation, Santa Clara, CA (US);
Abstract
Systems, methods, and circuitries for synchronizing a first phase locked loop (PLL) with a second PLL are provided. In one example a PLL system includes a first PLL configured to generate a first signal; a second PLL configured to generate a second signal; and phase calculation circuitry. The phase calculation circuitry is configured to calculate a phase of the first signal at a given time; and provide the calculated phase to the second PLL for use by the second PLL in synchronizing a phase of the second with the phase of the first signal.