The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2019

Filed:

Aug. 31, 2016
Applicant:

Ememory Technology Inc., Hsinchu, TW;

Inventors:

Ying-Je Chen, Taichung, TW;

Wei-Ren Chen, Pingtung County, TW;

Wein-Town Sun, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); G11C 16/04 (2006.01); G11C 16/30 (2006.01); G11C 16/12 (2006.01); G11C 16/14 (2006.01); G11C 16/26 (2006.01); H01L 27/11558 (2017.01); G11C 16/10 (2006.01); G11C 16/16 (2006.01); H01L 27/11521 (2017.01); H01L 27/11526 (2017.01); G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 7/22 (2006.01); G11C 16/08 (2006.01); G11C 16/24 (2006.01); H01L 23/528 (2006.01); H01L 27/02 (2006.01); H01L 27/11517 (2017.01); G11C 7/06 (2006.01); G11C 8/10 (2006.01); H01L 27/11524 (2017.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 27/11519 (2017.01);
U.S. Cl.
CPC ...
G11C 16/30 (2013.01); G11C 7/065 (2013.01); G11C 7/10 (2013.01); G11C 7/12 (2013.01); G11C 7/22 (2013.01); G11C 8/10 (2013.01); G11C 16/0408 (2013.01); G11C 16/0433 (2013.01); G11C 16/0458 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/12 (2013.01); G11C 16/14 (2013.01); G11C 16/16 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 27/11517 (2013.01); H01L 27/11519 (2013.01); H01L 27/11521 (2013.01); H01L 27/11524 (2013.01); H01L 27/11526 (2013.01); H01L 27/11558 (2013.01); H01L 27/1203 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/1095 (2013.01); H01L 29/42328 (2013.01);
Abstract

A nonvolatile memory structure includes a first PMOS transistor and a first floating-gate transistor on a first active region in a substrate, a second PMOS transistor and a second floating-gate transistor on a second active region in the substrate, and an n-type erase region in the substrate. A source line connects with sources of the first and the second PMOS transistors. A bit line connects with drains of the first and the second floating-gate transistors. A word line connects with first and the second select gates in the first and the second PMOS transistors respectively. An erase line connects with the n-type erase region. The first floating-gate transistor includes a first floating gate with an extended portion extending on a first portion of the n-type erase region. The second floating-gate transistor includes a second floating gate with an extended portion extending on a second portion of the n-type erase region.


Find Patent Forward Citations

Chen, Ying-Je. (2019). Nonvolatile memory structure (U.S. Patent No. 10262746). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10262746

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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