The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2019

Filed:

May. 05, 2017
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Chun Liu, Hsinchu, TW;

Shih-Chou Juan, Taoyuan, TW;

Nai-Ping Kuo, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G06F 3/06 (2006.01); G11C 16/14 (2006.01); G11C 8/06 (2006.01); G11C 16/08 (2006.01); G11C 16/16 (2006.01); G11C 16/32 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0653 (2013.01); G06F 3/061 (2013.01); G06F 3/065 (2013.01); G06F 3/0652 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0688 (2013.01); G11C 8/06 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/16 (2013.01); G11C 16/32 (2013.01); G11C 16/3459 (2013.01);
Abstract

A memory system includes a first flash memory, a second flash memory and a controller. The first flash memory includes a memory array divided into a plurality of pages. The controller is coupled to the first flash memory and the second flash memory and configured to: control the second flash memory to record an address of a particular page in the first flash memory before programming the particular page; and control the second flash memory to record a program status of the particular page after the particular page has been programed.


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