The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2019
Filed:
Apr. 18, 2018
Microsemi Soc Corp., San Jose, CA (US);
Microsemi SoC Corp., San Jose, CA (US);
Abstract
A resistive random-access memory device formed on a semiconductor substrate includes an interlayer dielectric formed over the semiconductor substrate and includes a first via. A chemical-mechanical-polishing stop layer is formed over the interlayer dielectric. A lower metal layer formed in the first via presents a substantially planar top surface. A dielectric layer is formed over the chemical-mechanical-polishing stop layer and is in electrical contact with the lower metal layer. A barrier metal layer is formed over the dielectric layer. Edges of the dielectric layer and the first barrier metal layer form an aligned stack having edges extending beyond outer edges of the first via. A dielectric barrier layer including a second via is formed over the aligned stack and at least a portion of the chemical-mechanical-polishing stop layer. An upper metal layer formed in the second via in electrical contact with the barrier metal layer.