The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Jul. 31, 2017
Applicant:

Arizona Board of Regents on Behalf of Arizona State University, Scottsdale, AZ (US);

Inventors:

Andre Filipe Rodrigues Augusto, Tempe, AZ (US);

Stanislau Herasimenka, Tempe, AZ (US);

Stuart Bowden, Tempe, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02S 40/38 (2014.01); H01L 31/00 (2006.01); H01L 33/00 (2010.01); H01L 31/12 (2006.01); H01L 31/02 (2006.01); H01L 31/0376 (2006.01); H01L 31/0224 (2006.01); H01L 31/18 (2006.01); H01L 31/054 (2014.01); H01L 31/20 (2006.01); H01L 31/0216 (2014.01); H01L 31/0352 (2006.01); H01L 33/34 (2010.01); H01L 33/42 (2010.01); H01L 33/46 (2010.01); H01L 33/22 (2010.01); H01L 33/24 (2010.01); H01L 31/042 (2014.01); H01L 31/05 (2014.01); H01L 31/0747 (2012.01);
U.S. Cl.
CPC ...
H01L 31/125 (2013.01); H01L 31/02008 (2013.01); H01L 31/0216 (2013.01); H01L 31/022475 (2013.01); H01L 31/03762 (2013.01); H01L 31/035281 (2013.01); H01L 31/042 (2013.01); H01L 31/0504 (2013.01); H01L 31/0547 (2014.12); H01L 31/0747 (2013.01); H01L 31/1868 (2013.01); H01L 31/1884 (2013.01); H01L 31/202 (2013.01); H01L 33/0058 (2013.01); H01L 33/0095 (2013.01); H01L 33/22 (2013.01); H01L 33/24 (2013.01); H01L 33/34 (2013.01); H01L 33/42 (2013.01); H01L 33/46 (2013.01); H02S 40/38 (2014.12); H01L 2933/0016 (2013.01); H01L 2933/0025 (2013.01);
Abstract

An apparatus includes a flexible silicon (Si) substrate, such as a crystalline n-type substrate, and a heterostructure structure formed on the silicon substrate. The heterojunction structure includes a first layered structured deposited on a first side of the silicon substrate. The first layered structured includes a first amorphous intrinsic silicon layer, an amorphous n-type or p-type silicon layer, and a transparent conductive layer. The second layered structure includes a second amorphous intrinsic silicon layer, an amorphous p-type or n-type silicon layer, and a transparent conductive layer. The heterostructure structure is configured to operate as a photovoltaic cell and an infrared light emitting diode.


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