The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Aug. 02, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Oren Ben-Kiki, Tel-Aviv, IL;

Yuval Yosef, Hadera, IL;

Ilan Pardo, Ramat-Hasharon, IL;

Dror Markovich, Tel Aviv, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 9/46 (2006.01); G06F 15/80 (2006.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3851 (2013.01); G06F 9/30079 (2013.01); G06F 9/3836 (2013.01); G06F 9/3855 (2013.01); G06F 9/3861 (2013.01); G06F 9/3877 (2013.01); G06F 9/46 (2013.01); G06F 15/80 (2013.01); G06F 15/7867 (2013.01); G06F 15/7892 (2013.01);
Abstract

An apparatus and method are described for executing both latency-optimized execution logic and throughput-optimized execution logic on a processing device. For example, a processor according to one embodiment comprises: latency-optimized execution logic to execute a first type of program code; throughput-optimized execution logic to execute a second type of program code, wherein the first type of program code and the second type of program code are designed for the same instruction set architecture; logic to identify the first type of program code and the second type of program code within a process and to distribute the first type of program code for execution on the latency-optimized execution logic and the second type of program code for execution on the throughput-optimized execution logic.


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