The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

May. 13, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Rajesh Poornachandran, Portland, OR (US);

Rajeev Muralidhar, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 1/3287 (2019.01); G06F 1/3206 (2019.01); G06F 1/3234 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/3206 (2013.01); G06F 1/3234 (2013.01);
Abstract

Methods and apparatus relating to Based Priority Application Event Control (PAEC) to reduce application events are described. In one embodiment, PAEC may determine which applications (and their corresponding sub-system(s)) may cause a processor or platform to exit a low power consumption state. In an embodiment, PAEC may determine which applications (and their corresponding sub-system(s)) may resume operations after a processor or platform exit a low power consumption state. Other embodiments are also claimed and disclosed.


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