The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 2019
Filed:
Jun. 26, 2015
Intel Corporation, Santa Clara, CA (US);
Kai Xiao, University Place, WA (US);
Raul Enriquez Shibayama, Zapopan, MX;
Gong Ouyang, Olympia, WA (US);
Jose Diego Guillen Gonzalez, Guadalajara, MX;
Beom-Taek Lee, Mountain View, CA (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
Techniques and mechanisms to provide a compact arrangement of vias extending through at least a portion of a printed circuit board (PCB) or other substrate. In an embodiment, the substrate includes a dielectric material and a sidewall structure forming a hole region that extends at least partially through the dielectric material. The hole region adjoins each of a first via and a second via, and is also located between the first via and second via. In another embodiment, the first via is coupled to exchange a first signal of a differential signal pair, and the second via is coupled to exchange a second signal of the same differential signal pair.