The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 2019
Filed:
Dec. 25, 2017
Industrial Technology Research Institute, Hsinchu, TW;
Intellectual Property Innovation Corporation, Hsinchu, TW;
Jie-Mo Lin, Taichung, TW;
Shu-Wei Kuo, Hsinchu County, TW;
Wei-Yuan Cheng, Hsinchu County, TW;
Chen-Tsai Yang, Taoyuan, TW;
Industrial Technology Research Institute, Hsinchu, TW;
Intellectual Property Innovation Corporation, Hsinchu, TW;
Abstract
A redistribution layer structure of the semiconductor package includes a dielectric layer having a thickness, at least one upper conductive wire disposed on a first surface of the dielectric layer, at least one lower conductive wire disposed on a second surface of the dielectric layer, and vias penetrating the dielectric layer and connecting the at least one upper conductive wire and the at least one lower conductive wire. Each via has a cross-section at one upper conductive wire. The cross-section has a third width. The ratio of the third width to the thickness of the dielectric layer is less than or equal to 1. The ratio of the pitch between every two adjacent vias to the third width is greater than or equal to 0.5.