The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

Apr. 12, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Jeffrey Shearer, Albany, NY (US);

John R. Sporre, Albany, NY (US);

Nicole A. Saulnier, Albany, NY (US);

Hyung Joo Shin, Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/535 (2006.01); H01L 29/66 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/823431 (2013.01); H01L 21/823468 (2013.01); H01L 21/823475 (2013.01); H01L 23/535 (2013.01); H01L 27/0886 (2013.01); H01L 29/66545 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes forming a plurality of gate structures spaced apart from each other on a fin, forming an inorganic plug portion on the fin between at least two gate structures of the plurality of gate structures, forming a dielectric layer on the fin and between remaining gate structures of the plurality of gate structures, forming an organic planarizing layer (OPL) on the plurality of gate structures and on the inorganic plug portion, removing a portion of the OPL to expose the inorganic plug portion, selectively removing the inorganic plug portion, and forming a contact on the fin in place of the removed inorganic plug portion.


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