The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2019

Filed:

May. 31, 2017
Applicant:

Cavium, Llc, Santa Clara, CA (US);

Inventors:

Shubhendu Sekhar Mukherjee, Southborough, MA (US);

Isam Wadih Akkawi, Santa Clara, CA (US);

David Asher, Sutton, MA (US);

Michael Bertone, Marlborough, MA (US);

David Albert Carlson, Haslet, TX (US);

Bradley Dobbie, Cambridge, MA (US);

Richard Eugene Kessler, Northborough, MA (US);

Assignee:

Cavium, LLC, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/52 (2006.01); G06F 9/48 (2006.01); G06F 9/54 (2006.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3009 (2013.01); G06F 9/30072 (2013.01); G06F 9/30079 (2013.01); G06F 9/4881 (2013.01); G06F 9/526 (2013.01); G06F 9/528 (2013.01); G06F 9/546 (2013.01);
Abstract

Managing instructions on a processor includes: executing threads having access to a stored library of operations. For a first thread executing on the first processor core, for each instruction included in the first thread and identified as being associated with a lock operation corresponding to a particular lock, the managing includes determining if the particular lock has already been acquired for another thread executing on a processor core other than the first processor core, and if so, continuing to perform the lock operation for multiple attempts using a hardware lock operation different from the lock operation in the stored library, and if not, acquiring the particular lock for the first thread. The hardware lock operation performs a modified atomic operation that changes a result of the hardware lock operation for failed attempts to acquire the particular lock relative to a result of the lock operation in the stored library.


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