The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2019

Filed:

Aug. 07, 2017
Applicant:

Juniper Networks, Inc., Sunnyvale, CA (US);

Inventors:

Peng Su, Santa Clara, CA (US);

Helen L. Turner, Cupertino, CA (US);

Marc D. Hartranft, Scotts Valley, CA (US);

Gautam Ganguly, San Jose, CA (US);

Guhan Subbarayan, Fremont, CA (US);

Assignee:

Juniper Networks, Inc, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/04 (2006.01); H01L 23/498 (2006.01); H01L 21/768 (2006.01); H05K 3/34 (2006.01); H05K 3/24 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 21/76882 (2013.01); H05K 3/24 (2013.01); H05K 3/3494 (2013.01);
Abstract

The disclosed apparatus may include (1) a stiffening brace that (A) is coupled to a top surface of a lidless integrated circuit and (B) includes at least one joint and (2) a removable lid that (A) interfaces with the stiffening brace at the joint, (B) temporarily sits atop the stiffening brace during a reflow process in which a bottom surface of the lidless integrated circuit is soldered to a circuit board, and (C) provides structural support to the lidless integrated circuit to impede the lidless integrated circuit from warping during the reflow process. Various other apparatuses, systems, and methods are also disclosed.


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