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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10242848 B1

PDFFull Text
Date of Patent:
Mar. 26, 2019

Filed:

Dec. 12, 2014

Carrier ring structure and chamber systems including the same

Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Eli Jeon, Sherwood, OR (US);

Nick Ray Linebarger, Jr., Beaverton, OR (US);

Sirish Reddy, Tualatin, OR (US);

Alice Hollister, Tualatin, OR (US);

Rungthiwa Methaapanon, Tualatin, OR (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:

Penilla IP, APC

Primary Examiner:

Parviz Hassanzadeh

Assistant Examiner:

Tiffany Z Nuckols

Int. Cl.
CPC ...
H01L 21/67 (2006.01); H01L 21/687 (2006.01); H01L 21/683 (2006.01); C23C 14/50 (2006.01); C23C 16/452 (2006.01); H01J 37/32 (2006.01); H01L 21/285 (2006.01); C23C 16/458 (2006.01); C23C 16/455 (2006.01); H01L 21/02 (2006.01); C23C 16/52 (2006.01);
U.S. Cl.
CPC ...
H01J 37/32715 (2013.01); H01J 37/32733 (2013.01); H01L 21/68735 (2013.01); C23C 16/458 (2013.01); C23C 16/45544 (2013.01); C23C 16/52 (2013.01); H01L 21/0228 (2013.01); H01L 21/0262 (2013.01); H01L 21/28556 (2013.01); H01L 21/67 (2013.01);
Abstract

A carrier ring for use in a chamber implemented for depositing films and chambers that use the carrier ring are provided. The carrier ring has an annular disk shape with an outer edge side and a wafer edge side. The carrier ring has a top carrier ring surface that extends between the outer edge side to the wafer edge side. The wafer edge side includes a lower carrier ring surface that is lower than the top carrier ring surface. The wafer edge side also includes a plurality of contact support structures. Each contact support structure is located at an edge of the lower carrier ring surface and has a height that is between the lower carrier ring surface and the top carrier ring surface, and the contact support structure has tapered edges and corners. A step is defined between the top carrier ring surface and the lower carrier ring surface, such that a top facing edge is disposed at a top of the step and a lower inner edge is disposed at the bottom of the step. Each of the top facing edge and the lower inner edge have a rounded non-sharp edge and a top of each of the contact support structures is configured for contact with a bottom edge surface of a wafer for lifting and lowering and moving the wafer.

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