The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2019

Filed:

Sep. 04, 2015
Applicant:

Neo Semiconductor, Inc., San Jose, CA (US);

Inventor:

Fu-Chang Hsu, San Jose, CA (US);

Assignee:

NEO Semiconductor, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/32 (2006.01); G11C 16/08 (2006.01); G11C 16/16 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 16/08 (2013.01); G11C 16/16 (2013.01); G11C 16/32 (2013.01); G11C 7/1039 (2013.01);
Abstract

A method of storing information or data in a nonvolatile memory device with multiple-page programming. The method, in one aspect, is able to activate a first drain select gate ('DSG') signal. After loading the first data from a bit line ('BL') to a nonvolatile memory page of a first memory block in response to activation of the first DSG signal during a first clock cycle, the first DSG signal is deactivated. Upon activating a second DSG signal, the second data is loaded from the BL to a nonvolatile memory page of a second memory block. The first data and the second data are simultaneously written to the first memory block and the second memory block, respectively.


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