The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2019
Filed:
May. 15, 2017
Intel Corporation, Santa Clara, CA (US);
Weimin Zhang, San Jose, CA (US);
Nelson Joseph Gaspard, San Jose, CA (US);
Yanzhong Xu, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit is provided that includes memory elements that exhibit immunity to soft error upset (SEU) events when subjected to high-energy atomic particle strikes. Each memory element may include at least two inverting circuits coupled in a feedback loop. Transistors in the memory element may be grouped in one contiguous region or divided into multiple separate regions. The memory element may include a long gate conductor that extends outside the boundary of the one contiguous region or the multiple separated regions. The long gate conductor may serve to provide parasitic resistance in the feedback loop to help mitigate SEU disturbances.