The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2019

Filed:

Jul. 11, 2017
Applicant:

Toyoda Gosei Co., Ltd., Kiyosu-shi, JP;

Inventors:

Junichiro Kurosaki, Kiyosu, JP;

Tohru Oka, Kiyosu, JP;

Junya Nishii, Kiyosu, JP;

Tsutomu Ina, Kiyosu, JP;

Assignee:

TOYODA GOSEI CO., LTD., Kiyosu-Shi, Aichi-Ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/306 (2006.01); H01L 29/786 (2006.01); H01L 21/205 (2006.01); H01L 29/12 (2006.01); H01L 29/51 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/20 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/205 (2013.01); H01L 21/306 (2013.01); H01L 29/12 (2013.01); H01L 29/41766 (2013.01); H01L 29/517 (2013.01); H01L 29/66348 (2013.01); H01L 29/66712 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/7397 (2013.01); H01L 29/7802 (2013.01); H01L 29/786 (2013.01); H01L 29/7827 (2013.01); H01L 29/1608 (2013.01); H01L 29/2003 (2013.01); H01L 29/513 (2013.01);
Abstract

To suppress current leakage in a semiconductor device having a gate insulating film and a gate electrode. A gate electrode is continuously formed in a film via a gate insulating film on the bottom surface of a trench, the side surfaces of a trench, and the top surfaces of a second n-type layer in the vicinity of the side surfaces of the trench. The ends of the bottom surface of the gate electrode are aligned with the ends of the top surface of the gate insulating film, and the ends of the bottom surface of the gate insulating film are formed in contact with the surfaces of the second n-type layer facing the ends of the bottom surface of the gate electrode. The passivation film covers the entire top surface of the device except the contact holes of the gate electrode and the source electrode.


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