The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2019
Filed:
Nov. 20, 2017
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventors:
Wen-Sung Hsu, Zhubei, TW;
Ta-Jen Yu, Taichung, TW;
Assignee:
MEDIATEK INC., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/04 (2006.01); H01L 21/44 (2006.01); H01L 23/498 (2006.01); H01L 23/50 (2006.01); H01L 23/538 (2006.01); H05K 1/18 (2006.01); H05K 3/20 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 23/49822 (2013.01); H01L 23/50 (2013.01); H01L 23/5384 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H05K 1/185 (2013.01); H05K 3/205 (2013.01);
Abstract
A package substrate is provided. The package substrate includes a dielectric layer and a passive component embedded in the dielectric layer and contacting the dielectric layer. A circuit layer is embedded in the dielectric layer and has a first surface aligned with a second surface of the dielectric layer. A conductive structure is embedded in the dielectric layer and electrically connected to the passive component and the circuit layer. A chip package is also provided.