The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2019
Filed:
Jun. 10, 2013
Applicant:
Freescale Semiconductor, Inc., Austin, TX (US);
Inventors:
Michael B. McShane, Austin, TX (US);
Perry H. Pelley, Austin, TX (US);
Tab A. Stephens, Austin, TX (US);
Assignee:
NXP USA, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 10/07 (2013.01); H01L 21/66 (2006.01); G01R 31/311 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
H04B 10/07 (2013.01); H01L 22/12 (2013.01); G01R 31/2884 (2013.01); G01R 31/311 (2013.01);
Abstract
An integrated circuit optical die test interface and associated testing method are described for using scribe area optical mirror structures () to perform wafer die tests on MEMS optical beam waveguide () and optical circuit elements () by perpendicularly deflecting optical test signals () from the scribe area optical mirror structures () into and out of the plane of the integrated circuit die under test () and/or production test die ().