The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2019

Filed:

Dec. 05, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Tatsuya Hinoue, Yokkaichi, JP;

Tomoyuki Obu, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); G11C 16/08 (2006.01); G11C 16/04 (2006.01); H01L 29/423 (2006.01); H01L 27/11582 (2017.01); H01L 27/11565 (2017.01); H01L 27/11529 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); G11C 16/0483 (2013.01); H01L 27/11529 (2013.01); H01L 27/11565 (2013.01); H01L 29/42344 (2013.01); H01L 2924/01074 (2013.01);
Abstract

A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming memory stack structures through the alternating stack, such that each of the memory stack structures includes a memory film and a vertical semiconductor channel, forming backside recesses by removing the sacrificial material layers selective to the insulating layers and the memory stack structures, forming a backside blocking dielectric layer in the backside recesses, forming an amorphous titanium oxide layer on surfaces of the backside blocking dielectric layer in the backside recesses, and forming tungsten word lines in the backside recesses using a fluorine-free tungsten-containing precursor gas.


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