The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2019

Filed:

Dec. 22, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ido Ouziel, Ein Carmel, IL;

Raanan Sade, Kibutz Sarid, IL;

Jacob Doweck, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/312 (2018.01); G06F 9/48 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3016 (2013.01); G06F 9/30043 (2013.01); G06F 9/30189 (2013.01); G06F 9/383 (2013.01); G06F 9/3855 (2013.01); G06F 9/3857 (2013.01); G06F 9/485 (2013.01); G06F 9/4837 (2013.01); G06F 9/4887 (2013.01);
Abstract

A processor includes a decoder, a data return buffer, and an execution unit. The decoder is to decode an instruction for a non-posted load into a decoded instruction for loading data from memory mapped input/output. The execution unit is for executing the decoded instruction. The execution is to start a timer, determine whether the timer exceeds a timeout threshold, allocate an entry in the data return buffer for the load, and determine whether an event arrived. The timer is to measure an amount of time taken to return the non-posted load instruction. The determination whether an event arrived is made in response to at least one of the allocation of the entry for the load, or a determination that the timer exceeds the timeout threshold.


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