The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2019
Filed:
Apr. 03, 2018
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Rotem Banin, Pardes-Hana, IL;
Elias Nassar, Haifa, IL;
Inbar Falkov, Tel Aviv, IL;
Eyal Fayneh, Givatyim, IL;
Ofir Degani, Haifa, IL;
Sebastian Sievert, Munich, DE;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/50 (2006.01); H03M 1/82 (2006.01); H03K 5/131 (2014.01); H03L 7/091 (2006.01); H03K 19/21 (2006.01); H03M 1/66 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/82 (2013.01); H03K 5/131 (2013.01); H03K 19/21 (2013.01); H03L 7/091 (2013.01); H03M 1/662 (2013.01); H03K 2005/00058 (2013.01);
Abstract
Some embodiments include apparatus and methods using a first digital-to-time converter (DTC) circuit to receive an input clock signal and generate a first clock signal based on the input clock signal, a second DTC circuit to receive the input clock signal and generate a second clock signal based on the input clock signal, and an output circuit to receive the first and second clock signals to generate an output clock signal based on the first and second clock signals.