The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2019
Filed:
Jun. 16, 2017
Intel Corporation, Santa Clara, CA (US);
Kok Wah Khor, Nibong Tebal, MY;
Eng Ling Ho, Bayan Lepas, MY;
Intel Corporation, Santa Clara, CA (US);
Abstract
A system may include a host processor and a coprocessor for accelerating tasks received from the host processor. The coprocessor may include programmable circuitry organized into logic sectors. Each logic sector may have a dedicated local sector manager (LSM). The LSMs may be controlled by a secure device manager (SDM). The SDM may be coupled to data unloading circuitry for unloading configuration data from the coprocessor off onto the host processor. The unloading circuitry may include a circular first-in first-out (FIFO) buffer circuit that can be divided into multiple partitions to store configuration data from the various LSMs. The FIFO buffer circuit may be configured as an input FIFO in a configuration (loading) mode or as an output FIFO in a data unloading mode.