The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2019

Filed:

Nov. 27, 2012
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Armin Tilke, Hopewell Junction, NY (US);

Jiang Yan, Newburgh, NY (US);

Matthias Hierlemann, Hopewell Junction, NY (US);

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 29/04 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/045 (2013.01); H01L 21/76251 (2013.01); H01L 21/823878 (2013.01); H01L 21/84 (2013.01); H01L 27/092 (2013.01); H01L 27/1203 (2013.01); H01L 29/1054 (2013.01); H01L 29/7842 (2013.01); H01L 29/7843 (2013.01); H01L 29/7846 (2013.01); H01L 29/7849 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A silicon-on-insulator device having multiple crystal orientations is disclosed. In one embodiment, the silicon-on-insulator device includes a substrate layer, an insulating layer disposed on the substrate layer, a first silicon layer, and a strained silicon layer. The first silicon layer has a first crystal orientation and is disposed on a portion of the insulating layer, and the strained silicon layer is disposed on another portion of the insulating layer and has a crystal orientation different from the first crystal orientation.


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